Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Instrukcja Użytkownika Pobierz pdf (Strona 88)

7 DETAILS OF INSTRUCTIONS

EPSON

S1C33 FAMILY C33 PE CORE MANUAL

jp %rb / jp.d %rb

Function

Unconditional jump

Standard) pc

← rb

Extension 1) Unusable

Extension 2) Unusable

Code

15 12 11 8 7 4 3 0

0 0 0 0 0 1 1 d 1 0 0 0

r b

0x068_, 0x078_

jp %rb when d bit (bit 8) = 0

jp.d %rb when d bit (bit 8) = 1

Flag

IE C V Z N

– – – – –

Mode

CLK

jp Three cycles

jp.d Two cycles

Description

(1) Standard

jp %rb

The content of the

rb register is loaded to the PC, and the program branches to that address. The

LSB of the rb register is ignored and is always handled as 0.

(2) Delayed branch (d bit = 1)

jp.d %rb

For the jp.d instruction, the next instruction becomes a delayed instruction. A delayed

instruction is executed before the program branches. Exceptions are masked in intervals

between the jp.d instruction and the next instruction, so no interrupts or exceptions occur.

Example

jp %r0 ; Jumps to the address specified by the R0 register.

Caution

When the jp.d instruction (delayed branch) is used, be careful to ensure that the next instruction

is limited to those that can be used as a delayed instruction. If any other instruction is executed, the

program may operate indeterminately. For the usable instructions, refer to the instruction list in the

Appendix.

1 2 ... 83 84 85 86 87 88 89 90 91 92 93 ... 180 181

Brak uwag

Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Instrukcja Użytkownika Strona 88