Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Instrukcja Użytkownika Pobierz pdf (Strona 133)

7 DETAILS OF INSTRUCTIONS

S1C33 FAMILY C33 PE CORE MANUAL

EPSON

125

ld.w [%rb], %rs

Function

Word data transfer

Standard) W[

rb] ← rs

Extension 1) W[

rb + imm13] ← rs

Extension 2) W[

rb + imm26] ← rs

Code

15 12 11 8 7 4 3 0

0 0 1 1 1 1 0 0

r b r s

0x3C__

Flag

IE C V Z N

– – – – –

Mode

Src: Register direct %rs = %r0 to %r15

Dst: Register indirect

%rb = %r0 to %r15

CLK

One cycle (two cycles when ext is used)

Description

(1) Standard

ld.w [

%rb],%rs ; memory address = rb

The content of the rs register (word data) is transferred to the specified memory location. The

rb register contains the memory address to be accessed.

(2) Extension 1

ext

imm13

ld.w [

%rb],%rs ; memory address = rb + imm13

The ext instruction changes the addressing mode to register indirect addressing with

displacement. As a result, the content of the rs register is transferred to the address indicated

by the content of the

rb register with the 13-bit immediate imm13 added. The content of the rb

(3) Extension 2

ext

imm13 ; = imm26(25:13)

ext

imm13 ; = imm26(12:0)

ld.w [

%rb],%rs ; memory address = rb + imm26

The addressing mode changes to register indirect addressing with displacement, so the content

of the rs register is transferred to the address indicated by the content of the

rb register with the

26-bit immediate

imm26 added. The content of the rb register is not altered.

Caution

The rb register and the displacement must specify a word boundary address (two least significant

bits = 0). Specifying an odd address causes an address misaligned exception.

1 2 ... 128 129 130 131 132 133 134 135 136 137 138 ... 180 181

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