
7 DETAILS OF INSTRUCTIONS
130
EPSON
S1C33 FAMILY C33 PE CORE MANUAL
mltu.h %rd, %rs
Function
Unsigned 16-bit × 16-bit multiplication
Standard) alr
← rd(15:0) × rs(15:0)
Extension 1) Unusable
Extension 2) Unusable
Code
15 12 11 8 7 4 3 0
1 0 1 0 0 1 1 0
r s r d
0xA6__
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Flag
IE C V Z N
– – – – –
|
|
|
|
Mode
Src: Register direct %rs = %r0 to %r15
Dst: Register direct
%rd = %r0 to %r15
CLK
Five cycles
Description
The 16 low-order bits of the rd register and the 16 low-order bits of the rs register are multiplied
together without signs, and the 32-bit product resulting from the operation is loaded into the ALR
register.
Example
mltu.h %r0,%r1 ; alr ← r0(15:0) × r1(15:0)
; unsigned multiplication
Komentarze do niniejszej Instrukcji