Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Instrukcja Użytkownika Pobierz pdf (Strona 129)

7 DETAILS OF INSTRUCTIONS

S1C33 FAMILY C33 PE CORE MANUAL

EPSON

121

ld.w %rd, [%rb]+

Function

Word data transfer

Standard) rd

← W[rb], rb ← rb + 4

Extension 1) Unusable

Extension 2) Unusable

Code

15 12 11 8 7 4 3 0

0 0 1 1 0 0 0 1

r b r d

0x31__

Flag

IE C V Z N

– – – – –

Mode

Src: Register indirect with post-increment %rb = %r0 to %r15

Dst: Register direct

%rd = %r0 to %r15

CLK

Two cycles

Description

The word data in the specified memory location is transferred to the rd register. The rb register

contains the memory address to be accessed. Following data transfer, the address in the

rb register

is incremented by 4.

Caution

(1) The rb register and the displacement must specify a word boundary address (two least

significant bits = 0). Specifying other addresses causes an address misaligned exception.

(2) If the same register is specified for rd and

rb, the incremented address after transferring data is

loaded to the rd register.

1 2 ... 124 125 126 127 128 129 130 131 132 133 134 ... 180 181

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Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Instrukcja Użytkownika Strona 129