Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Instrukcja Użytkownika Pobierz pdf (Strona 105)

7 DETAILS OF INSTRUCTIONS

S1C33 FAMILY C33 PE CORE MANUAL

EPSON

ld.b [%rb], %rs

Function

Signed byte data transfer

Standard) B[

rb] ← rs(7:0)

Extension 1) B[

rb + imm13] ← rs(7:0)

Extension 2) B[

rb + imm26] ← rs(7:0)

Code

15 12 11 8 7 4 3 0

0 0 1 1 0 1 0 0

r b r s

0x34__

Flag

IE C V Z N

– – – – –

Mode

Src: Register direct %rs = %r0 to %r15

Dst: Register indirect

%rb = %r0 to %r15

CLK

One cycle (two cycles when ext is used)

Description

(1) Standard

ld.b [

%rb],%rs ; memory address = rb

The 8 low-order bits of the rs register are transferred to the specified memory location. The

(2) Extension 1

ext

imm13

ld.b [

%rb],%rs ; memory address = rb + imm13

The ext instruction changes the addressing mode to register indirect addressing with

displacement. As a result, the 8 low-order bits of the rs register are transferred to the address

indicated by the content of the

rb register with the 13-bit immediate imm13 added. The content

of the rb register is not altered.

(3) Extension 2

ext

imm13 ; = imm26(25:13)

ext

imm13 ; = imm26(12:0)

ld.b [

%rb],%rs ; memory address = rb + imm26

The addressing mode changes to register indirect addressing with displacement, so the 8 low-

order bits of the rs register are transferred to the address indicated by the content of the rb

imm26 added. The content of the rb register is not altered.

1 2 ... 100 101 102 103 104 105 106 107 108 109 110 ... 180 181

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