
7 DETAILS OF INSTRUCTIONS
S1C33 FAMILY C33 PE CORE MANUAL
EPSON
101
ld.c imm4, %rs
Function
Transfer data to the coprocessor
Standard) W[CA(
imm4)] ← rs(7:0)
Extension 1) Unusable
Extension 2) Unusable
Code
15 12 11 8 7 4 3 0
1 0 1 1 0 1 0 1
imm4 r s
0xB5__
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Flag
IE C V Z N
– – – – –
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Mode
Src: Register direct %rs = %r0 to %r15
Dst: Immediate (unsigned)
CLK
One cycle
Description
(1) Standard
The contents of the general-purpose register rs is transferred to the coprocessor register
specified by
imm4. imm4 is output to the dedicated coprocessor address bus.
(2) Delayed instruction
This instruction may be executed as a delayed instruction by writing it directly after a branch
instruction with the “d” bit.
Example
ld.c 0x5,%r2 ; coprocessor reg5 ← r2
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