Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Instrukcja Użytkownika Pobierz pdf (Strona 130)

7 DETAILS OF INSTRUCTIONS

122

EPSON

S1C33 FAMILY C33 PE CORE MANUAL

ld.w %rd, [%sp + imm6]

Function

Word data transfer

Standard) rd

← W[sp + imm6 × 4]

Extension 1) rd

← W[sp + imm19]

Extension 2) rd

← W[sp + imm32]

Code

15 12 11 10 9 4 3 0

0 1 0 1 0 0

imm6 r d

0x50__

Flag

IE C V Z N

– – – – –

Mode

Src: Register indirect with displacement

Dst: Register direct

%rd = %r0 to %r15

CLK

Two cycles

Description

(1) Standard

ld.w

%rd,[%sp + imm6] ; memory address = sp + imm6 × 4

The word data in the specified memory location is transferred to the rd register. The content

of the current SP with 4 times the 6-bit immediate

imm6 added as displacement comprises the

memory address to be accessed. The two least significant bits of the displacement are always 0.

(2) Extension 1

ext

imm13 ; = imm19(18:6)

ld.w

%rd,[%sp + imm6] ; memory address = sp + imm19,

;

imm6 = imm19(5:0)

The

ext instruction extends the displacement to a 19-bit quantity. As a result, the content of

the SP with the 19-bit immediate

imm19 added comprises the memory address, the word data

in which is transferred to the rd register. Make sure the

imm6 specified here resides on a word

boundary (two least significant bits = 0).

(3) Extension 2

ext

imm13 ; = imm32(31:19)

ext

imm13 ; = imm32(18:6)

ld.w

%rd,[%sp + imm6] ; memory address = sp + imm32,

;

imm6 = imm32(5:0)

The two

ext instructions extend the displacement to a 32-bit quantity. As a result, the content

of the SP with the 32-bit immediate imm32 added comprises the memory address, the word data

in which is transferred to the rd register. Make sure the

imm6 specified here resides on a word

boundary (two least significant bits = 0).

1 2 ... 125 126 127 128 129 130 131 132 133 134 135 ... 180 181

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