Epson CMOS 32-Bit Single Chip Microcomputer S1C33L03 Instrukcja Użytkownika Pobierz pdf (Strona 58)

6 FUNCTIONS

EPSON

S1C33 FAMILY C33 PE CORE MANUAL

Classification

Data transfer

System control

Immediate extension

Bit manipulation

Other

ld.b

ld.ub

ld.h

ld.uh

ld.w

nop

halt

slp

ext

btst

bclr

bset

bnot

swap

pushn

popn

%rd,%rs

%rd,

[%rb]

%rd,[%rb]+

%rd,[%sp+imm6

]

[%rb],%rs

[%rb]+,%rs

[%sp+imm6

],%rs

%rd,%rs

%rd,

[%rb]

%rd,

[%rb]+

%rd,[%sp+imm6

]

%rd,%rs

%rd,

[%rb]

%rd,

[%rb]+

%rd,[%sp+imm6

]

[%rb],%rs

[%rb]+,%rs

[%sp+imm6

],%rs

%rd,%rs

%rd,

[%rb]

%rd,

[%rb]+

%rd,[%sp+imm6

]

%rd,%rs

%rd,sign6

%rd,

[%rb]

%rd,

[%rb]+

%rd,[%sp+imm6

]

[%rb],%rs

[%rb]+,%rs

[%sp+imm6],%rs

imm13

[%rb],imm3

%rd,%rs

%rs

%rd

Mnemonic

Remark

Cycle

1–2 (∗4)

0–1 (∗2)

2–3 (∗4)

3–4 (∗4)

N+1

–

↔

–

Flag

Function-extended instructions

Table 6.2.2.2 Number of Instruction Execution Cycles and Flag Status (Function-Extended Instructions)

Classification

Logical operation

Shift and rotate

Data transfer

and

xor

not

srl

sll

sra

sla

ld.w

%rd,%rs

%rd,sign6

%rd,%rs

%rd,sign6

%rd,%rs

%rd,sign6

%rd,%rs

%rd,sign6

%rd,%rs

%rd,imm5

%rd,%rs

%rd,imm5

%rd,%rs

%rd,imm5

%rd,%rs

%rd,imm5

%rd,%rs

%rd,imm5

%rd,%rs

%rd,imm5

%rd,%ss

%sd,%rs

Remark

Cycle

1–3 (∗5)

–

↔

–

↔

–

Mnemonic

Flag

1 2 ... 53 54 55 56 57 58 59 60 61 62 63 ... 180 181

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