Epson Powerspan Instrukcja Użytkownika Strona 9

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DIMM.AM335x (Rev3) 9/24
The signal LINK_LED# indicates if data packages are transferred. If a link is established every packet
causes an 80 ms long low pulse.
The signal SPEED_LED# indicates the transfer speed of the connection. Low = 100 Mbit/s, high =
10 Mbit/s.
A 1:1 transformer with center taps connected to 3.3V, must be added externally to the signal lines.
3.7 USB Interfaces
Two USB Rev 2.0 OTG compliant controllers are integrated in the processor AM335x. High-Speed
(480 Mbps), Full-Speed (12 Mbps) and Low-Speed (1.5 Mbps) transfers are supported. Each
controller has a 32 kByte Endpoint FIFO for transmit and receive.
At the SODIMM connector pins for one host and one device interface are provided.
The controller USB0 is always operated as a Host interface. The power switch control output
USBH_PEN# is part of the USB controller. The overcurrent signal input USBH_OC# from the
SODIMM connector is connected to GPIO pin GPIO1_20 of the processor. A logical “0” signals
overcurrent.
The second controller, USB1, is used in OTG mode. The ID input is pulled high on the module by a
10 KΩ resistor which preconfigures it to operate in device mode. For that operating mode the VBUS
input is available at the SODIMM pin USBF_VBUS. Now power is drawn from that pin. It is only used
to signal that a Host is connected.
Additionally the ID input can be controlled by the signal USB1_ID at the SODIMM connector. Thus
the mode can be switched between Device and Host mode by an external source. In the Host
mode the VBUS power switch control output USB1_PEN# is controlled by the USB controller and
available at pin 131 of the SODIMM connector. The corresponding overcurrent signal input
USB1_OC# from the SODIMM connector is connected with GPIO pin GPIO1_21of the processor. A
logical “0” signals overcurrent.
All necessary termination resistors are incorporated in the processor. No external resistors are
needed.
3.8 LCD Interface
3.8.1 General
The processor AM335x incorporates an LCD controller that can drive displays with resolutions up to
1280 x 768 pixels (WXGA). The colour depth is fixed at 24 bpp (RGB888).
The pixel clock is generated internally. Sourcing an external LCD clock is not possible.
All data and control lines are available at the SODIMM connector.
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